Offers First-to-Market VIP for the Emerging NVMe Storage Interface Protocol

Discovery VIP delivers up to 4X faster performance, rapid configurability, efficient protocol-aware debug, and quicker protocol compliance closure

VCS support for OVM 2.1.1 and the upcoming UVM 1.0 enables smooth migration to faster verification

Comprehensive Support for Low Power Techniques and High Level of Accuracy Significantly Improve Bug Detection. Synopsys, Inc. today announced that ST-Ericsson has adopted Synopsys' MVSIM low power dynamic verification solution for its STw8500 system-on-chip (SoC) platform for the mobile phone market. ST-Ericsson selected MVSIM for its proven ability to comprehensively verify low power techniques, including standby and built-in automated low power assertions, which enable the early detection of bugs.

Synopsys, Inc; today announced that Verivue, Inc. has standardized on the production-proven VMM verification methodology and VCS® functional verification solution, both key components of Synopsys' Discovery™ Verification Platform, for the verification of their flagship product, the MDX 9000 Series Media Distribution Switch.

Synopsys, Inc. today announced that Tego, Inc. has standardized on the production-proven VMM verification methodology and VCS® functional verification solution, both key components of Synopsys' Discovery™ Verification Platform, to verify their radio frequency identification (RFID) tags for the aviation industry.

Synopsys, Inc., a world leader in software and IP for semiconductor design and manufacturing, today unveiled new multicore technology within the VCS® functional verification solution, a key component of Synopsys’ Discovery™ Verification Platform. VCS multicore technology delivers a two-times (2x) improvement in verification performance by harnessing the power of multicore CPUs.

Enhancements to Industry's Most Proven Verification Methodology Include New Base Classes and Performance Analyzer Application

Addition of Altera Stratix III FPGA-based prototyping boards targets algorithmic design and early software development

sset Acquisition to Facilitate Expansion in the Fast-Growing Rapid Prototyping Segment

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that Chipright, CreVinn and Verilab, three leading European chip design and verification consulting companies, have standardized on the proven VMM verification methodology to streamline verification and speed time-to-market for their customers.

HSPICE, HSIM and WaveView Analyzer Deliver First-silicon Success

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that it has collaborated with ARM and Renesas Technology to define the industry's first methodology to address the rapidly increasing complexity of low power verification.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced it has released the source code for its complete implementation of the proven VMM verification methodology for SystemVerilog, including the VMM Standard Library and VMM Applications, under the popular Apache 2.0 open source license.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that it is donating its complete implementation of the proven VMM verification methodology for SystemVerilog, including the VMM Standard Library and VMM Applications, to Accellera to enable verification interoperability standardization.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that NextIO, a leader in I/O virtualization, has standardized on the VMM methodology, as defined in the Verification Methodology Manual (VMM) for SystemVerilog, and on Synopsys' VCS® functional verification product to accelerate the SystemVerilog-based verification of their newest I/O virtualization chip design.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that industry adoption and support of the Verification Methodology Manual (VMM) for SystemVerilog, co-authored by ARM and Synopsys, has steadily increased since the book's release in September 2005.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that Dublin-based Silicon & Software Systems Ltd. (S3), a leading provider of design and consulting services for integrated circuits and embedded software, is supporting the Synopsys VCS® comprehensive RTL verification solution and the Verification Methodology Manual (VMM) for SystemVerilog.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that it now supports the SystemVerilog language throughout its suite of design and verification products, extending its SystemVerilog leadership and establishing another industry-first achievement.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that its VCS® Verification Library, containing DesignWare® verification intellectual property (VIP), is first to support testbenches created using IEEE Std 1800™-2005 SystemVerilog and the coverage-driven methodology defined in the Verification Methodology Manual (VMM) for SystemVerilog, published by Springer Science+Business Media.

Synopsys, Inc. (Nasdaq:SNPS), a world leader in semiconductor design software, today announced that the Pioneer-NTB SystemVerilog testbench automation tool, a component of Synopsys' Discovery™ Verification Platform, was honored as the recipient in the design verification category in the annual International Engineering Consortium (IEC) DesignVision Awards program.